Platforms today have a variety of topologies, including one or more host processors, one or more accelerators, and various memory hierarchies. For example, some systems today include multi-level memory hierarchies in which a faster smaller memory (e.g., a DRAM) serves as a cache for a larger memory (e.g., a non-volatile memory). Additionally, in platforms including multiple host processors and or accelerators, each host processor and accelerator may be coupled with its own memory. Although including accelerator devices and accelerator-attached memory to a system can have advantages, there are also challenges and drawbacks, such as the power and performance costs associated with maintaining coherency in a shared virtual memory environment.